Hello, I'm
I'm deeply passionate about network architecture, telecommunications, and systems engineering. To me, the best part of engineering is taking incredibly complex problems and turning them into elegant, reliable hardware and software solutions.
Hello! I hold a Master's degree in Computer Engineering from Virginia Tech. I've always been fascinated by how things work under the hood, leading me to specialize at the exact intersection where hardware meets software. Whether it's designing VLSI circuits, fine-tuning embedded systems, or building web applications from scratch, I love getting my hands dirty.
Aside from my core academic work, I enjoy troubleshooting tough system architectures, designing intuitive websites, and contributing to published technical research.
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Graduate Teaching Assistant (Aug 2024 - Dec 2025)
Internship - FESTO Private Limited (June 2018 - July 2018)
GPA: 3.96/4.0
Awards / Courses: Real-Time Systems, Cellular Communication Systems, Computer Architecture, Compiler Optimizations, IoT System Design.
GPA: 9.75/10.0
Anantapur, India
GPA: 7.99/10.0
Chennai, India
Built a custom LLVM compiler pass designed to eliminate partial redundancies in code. By implementing multiple Lazy Code Motion workflows and utilizing Critical Edge Detection, the pass effectively streamlines and optimizes the compiler's intermediate representation.
Engineered a fully autonomous unmanned ground vehicle equipped with camera, radar, and IR sensors. By leveraging custom embedded systems, I created a robust data pipeline capable of actively detecting and identifying security threats.
Developed an end-to-end IoT framework that integrates Wi-Fi, BLE, and LoRaWAN. This involved processing sensor data using MQTT and deploying custom TinyML gesture recognition models directly to edge devices.
Developed an intuitive xApp in FlexRIC designed to adaptively allocate PRBs based on CQI in 5G networks, significantly enhancing overall network stability and performance metrics.
Dove deep into out-of-order execution by systematically analyzing and reconfiguring branch predictors and cache policies in a RISC-V BOOM Architecture to extract maximum instructions per cycle on machine learning workloads.
Built and evaluated real-time task scheduling algorithms for the ESP32 using FreeRTOS. I successfully managed conflicting constraints to optimize CPU utilization and scheduling predictability.
Designed and launched io-tools.com from the ground up. It's a comprehensive web toolkit featuring a sleek user interface and lightning-fast local execution for everyday engineering tools.
Design and Implementation of Unmanned ground vehicle for Intrusion Detection
Compliance Engineering Journal, Vol. 13, Issue 7, 2022, pp. 12-23 (IF = 6.1). DOI: 16.10089.CEJ.2022.V13I7.285311.3985